- Xilinx XC4VLX60 or XC4VSX35 Virtex®-4 FPGA
Need a larger FPGA? See here.
- 128Mbytes of DDR SDRAM connected as 32Mx32 @ 200Mhz
- FPGA configuration downloaded using the HERON Serial Bus.
- Choice of clocking options
- 180 bits DIO
- Connects to all of the HERON FIFOs, UMI and module ID signals
- Flash PROM for storage of FPGA configuration data
- This module can be used with ready made IP to perform often used functions
(ex VAT & shipping) HERON-FPGA14-SX35: £1,400
HERON-FPGA14 is supplied without cables as standard. However, some cables can be supplied included in the hardware price, if required. Please specify at time of ordering either up to six FPGA50 or up to six FPGA50-CameraLink cables or combinations of these up to a total of no more than 6 Hirose connectors. See HERON-FPGA14 cables for more information.
The HERON-FPGA14 provides a user programmable element for a HERON system combined with digital I/Os and SDRAM. The HERON-FPGA14 can be used as a hardware signal processing resource or as a flexible digital I/O module.
The module offers 128Mbytes of DDR SDRAM with 1.6Gbyte/sec total memory bandwidth. This off chip memory can be accessed from FPGA logic. The provided Hardware Interface Layer (HIL) VHDL includes a DDR memory controller that can be connected to user FPGA logic.
The module offers 180 bits of digital I/O. These I/Os can be configured by the FPGA design to use any Virtex®-4 I/O format. 4 of the 6 connectors have a choice of Vcco, the remaining two connectors have their Vcco fixed at 3.3V.
HERON-FPGA modules must be fitted to a HERON module carrier that provides power and control signals to the module. Most module carriers also offer FIFO based connections between modules and possibly between the modules and a host PC. Normally the configuration program for the FPGA is sent from a host PC via the Heron Serial Bus, allowing fast development, test, debug cycles as well as in-field upgradeability. Alternative ways of configuring the FPGA are the on-board FLASH based configuration PROM, and the JTAG header that accepts standard Xilinx JTAG cables such as Xilinx Parallel cable 4 or USB-JTAG cable.
After configuration the Heron Serial Bus can be used for inter-module messages allowing FPGA registers to be read and written to control the operation of the module as defined in the FPGA design
or Virtex®-4 XC4VSX35-11
|Memory:||DDR SDRAM 128 Mbytes organised as 32M x 32 at 200Mhz|
|Maximum Dimensions:||4.0 inches x 2.5inches x 6.5mm high.|
|Power requirements:||5V Max: dependent on FPGA
Typ: dependent on FPGA Configuration
12V Max: 0A
|Power consumption/Dissipation:||Max Bare FPGA package dissipation:
From 5V supply :
FPGA PSU power can source 12.5W
Rest of logic uses 0.6W
|Clocking Speed:||FPGA Max: dependent on your FPGA design
PowerPC Max: 400Mhz (-11 speed grade)
|I/O bandwidth:||e.g. HEPC9 400Mb/s in + 400Mb/s out|
Xilinx ISE® tools are required to make a new FPGA configuration.
Xilinx EDK® tools are required to make new PowerPC® configurations.
HUNT ENGINEERING provide software to download the FPGA configuration file onto the hardware, plus configuration examples.
HUNT ENGINEERING may offer to provide your configuration file for you, but this may be chargeable.
Need a ready made function? See the IP available for HERON-FPGA14
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