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Home>>Products>>Modules with FPGA & Embedded PowerPC>>HERON-FPGA9

HERON-FPGA9 module

HERON-FPGA9 Virtex-II Pro FPGA module with DDR SDRAM, Digital I/O, Flash memory and USB

  • Xilinx XC2VP7 Virtex-II Pro FPGA with embedded PowerPC 
    Need a larger FPGA? See here.
  • 256Mbytes of DDR SDRAM connected as 2 banks of 32Mx32 @ 200Mhz
  • 16Mbytes of FLASH memory for PowerPC code storage
  • FPGA configuration downloaded using the HERON Serial Bus.
  • Choice of clocking options
  • 30 bits DIO
  • USB (fast) host or peripheral.
  • Connects to all of the HERON FIFOs, UMI and module ID signals
  • Flash PROM for storage of FPGA configuration data
  • This module can be used with ready made IP to perform often used functions

(ex VAT & shipping) HERON-FPGA9: 1,450
HERON-FPGA9 is supplied without cables as standard. However, some cables can be supplied included in the hardware price, if required. Please specify at time of ordering either up to two FPGA30 or one FPGA30-CameraLink cables. See HERON-FPGA9 cables for more information.

The HERON-FPGA9 provides a user programmable element for a HERON system that combines FPGA hardware and a programmable PowerPC. The module offers two banks of DDR SDRAM offering a 3.2Gbyte/sec total memory bandwidth. It also offers 30 bits of digital I/O, a USB controller and FLASH memory intended for PPC code storage. It can be used to process data flows or as a flexible storage module.

Using the HERON serial bus allows the FPGA to be configured with a standard module configuration, or a custom one provided by the user, or HUNT ENGINEERING. After configuration the module can accept user messages over the HERON serial bus allowing registers etc to be programmed. If a more significant programming change is required a complete new FPGA configuration can be downloaded. The FLASH based configuration PROM can load the configuration data into the FPGA when it is used in an embedded system. This PROM can be programmed using the standard JTAG cable available from Xilinx (such as Xilinx Parallel cable 4 or USB-JTAG cable).

The PowerPC program can be downloaded as part of the FPGA design, or after the FPGA configuration using the GNU debugger or the HERON-FIFOs, or can be loaded from the FLASH memory provided on the module.

The Digital I/O has a number of voltage formats such as LVTTL or LVDS defined by the combination of a jumper setting and the configuration downloaded to the FPGA. The HERON-FPGA9 has a fast USB interface that can be programmed as a host or a peripheral.

The HERON-FPGA9 can access HERON-FIFOs at a rate of 32 bits per FIFO clock in AND 32 bits per FIFO clock out concurrently. For example with a FIFO clock of 100Mhz this is 400Mbytes/sec in AND 400Mbytes/sec out

The module has a 100Mhz oscillator connected to the FPGA, which can be divided or multiplied using the Digital Clock Managers of the FPGA. Additionally there are sockets where the user can add further Oscillator modules for specialist frequencies or jitter/stability specifications. Of course the digital I/Os and UMIs can be used to provide external clock sources to the FPGA.

NOTE: Virtex II Pro I/Os are not 5v tolerant!


 HERON-FPGA9 block diagram

Technical Specification

Processor: Virtex-II Pro - FPGA logic and PowerPC hard core
Memory: DDR SDRAM 256 Mbytes organised as two banks of 32M x 32 at 200Mhz
Flash 16 Mbytes - byte wide
Host Bus: HERON
Maximum Dimensions: 4.0 inches x 2.5inches x 6.5mm high.
Power requirements: 5V        Max: dependent on FPGA  configuration
            Typ: dependent on FPGA Configuration
12V      Max: 0A
           Typ: 0A
-12V     Max:0A
Clocking Speed: FPGA Max: dependent on your FPGA design
PowerPC Max: 350Mhz (-6 speed grade)
I/O bandwidth: e.g. HEPC9 400Mb/s in + 400Mb/s out

Xilinx ISE tools are required to make a new FPGA configuration.
Xilinx EDK tools are required to make new PowerPC configurations.
HUNT ENGINEERING provide software to download the FPGA configuration file onto the hardware, plus configuration examples.
HUNT ENGINEERING may offer to provide your configuration file for you, but this may be chargeable.

Need a ready made function? See the IP available for HERON-FPGA9

pdf  HERON-FPGA9 User Manual 

pdf  Print friendly version of this Datasheet

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