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HERON-FPGA3 Module
HERON-FPGA3 FPGA module with Digital I/O
- Xilinx Virtex®-II FPGA with 1M gates
Need a larger FPGA? See here.- FPGA configuration downloaded using the HERON Serial Bus.
- Choice of clocking options
- 90 user defined Digital I/Os
- Several serial I/O options possible -- configured by the FPGA.
- Connects to all of the HERON FIFOs, UMI and module ID signals
- Flash PROM for storage of configuration data
- This module can be used with ready made IP to perform often used functions
Price:
(ex VAT & shipping) HERON-FPGA3: £1,565
HERON-FPGA3 is supplied without cables as standard. However, some cables can be supplied included in the hardware price, if
required. Please specify at time of ordering either up to six FPGA30 or up
to three FPGA30-CameraLink cables or combinations of these up to a total of no more than
6 Hirose connectors. See HERON-FPGA3
cables for more information.
The HERON-FPGA3 provides a user programmable FPGA element for a HERON system. This can be used to process data flows or as a flexible digital I/O module.
Using the HERON serial bus allows the FPGA to be configured with a standard module configuration, or a custom one, provided by the user or HUNT ENGINEERING. After configuration the module can accept user messages over the HERON serial bus allowing registers etc to be programmed. If a more significant programming change is required a complete new FPGA configuration can be downloaded using the HSB. When the final FPGA configuration is known, a PROM can be factory fitted to configure the FPGA directly, such as would be required in an embedded system.
The Digital I/O has a number of voltage formats such as LVTTL or LVCMOS defined by the combination of a jumper setting and the configuration downloaded to the FPGA. In addition it is possible for the HERON-FPGA3 to be used as a choice of RS232, RS485 and Differential ECL serial interfaces.
The HERON-FPGA3 can access HERON-FIFOs at a rate of 32 bits per FIFO clock in AND 32 bits per FIFO clock out concurrently. For example with a FIFO clock of 100Mhz this is 400Mbytes/sec in AND 400Mbytes/sec out.
The use of a Virtex®-II XC2V1000fg456-4 part allows clock rates of up to 365Mhz and also provides hard coded multipliers and extended I/O formats such as
Low Voltage Differential Signalling (LVDS)
NOTE: Virtex II I/Os are not 5v tolerant!
HERON-FPGA3 Diagram
Technical Specification
| Processor: | Virtex®-II |
| Memory: | None external to FPGA |
| Host Bus: | HERON |
| Maximum Dimensions: | 4.0 inches x 2.5inches x 6.5mm high. |
| Power requirements: | 5V dependent on FPGA
configuration 12V Max: 0A Typ: 0A -12V Max:0A Typ:0A |
| FPGA Power consumption/dissipation |
Max Bare FPGA package dissipation: 2.4W |
| Clocking Speed: | Max HERON-FPGA3V 365Mhz |
| I/O bandwidth: | e.g. HEPC9 400Mb/s in + 400Mb/s out |
Xilinx Foundation series tools are required to make a new FPGA configuration.
HUNT ENGINEERING provide software to download the FPGA configuration file onto the
hardware, plus configuration examples.
HUNT ENGINEERING may offer to provide your configuration file for you, but this may be
chargeable.
Need a ready made function? See the IP available for HERON-FPGA3
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