Solving DDR2 reliability issues
A company asked us for advice on how to solve their problems. They had designed and made a custom board themselves. They had written test software that ran on the processor of their board and tested the features of the board. This passed on all boards - including running tests on the DDR2 memory.
However when they started to use their board in the automotive application that they had designed it for, it operated unpredictably. Thinking that the problem was buggy code, they tried to debug the system, but small changes to the code changed how the systems failed.
We discussed this for some time, and it became clear to us that it was not purely a software issue.
We proposed that we take their CADSTAR files for their board design and run some simulations on the memory interface. This would allow us to either rule out Signal Integrity (SI) issues or identify some areas to work on.
We used the IBIS models provided by the processor and memory manufacturers along with the information extracted from their actual PCB design to plot waveforms of the signals, and to check that the recommended design rules had been met.
The design rules for track routing lengths, matching of lengths for certain signal groups etc had all been met correctly with some safety margin.
Simulating the signals to check for signal levels, overshoot and undershoot etc showed that it was possible to have some serious problems with this interface.
The first thing to optimise was that the processor and memories could be programmed to drive their outputs with different drive strengths. This was provided to allow for board designs with single or multiple memory devices and with differing impedance PCB traces. We simulated all of the options and were able to recommend the best choice for this board design.
Having made that choice, we made a series of simulations that used different resistor values for the series termination resistors. This resulted in is recommending a significant change in the value of these resistors.
After providing our report, the customer told us that they didn't know that there were programmable drive strengths, nor how to program them. We obtained the data sheets for the processor and memory components from their manufacturers, and made a further report of how to program them, and how to select the settings that we had determined to be necessary.
We waited eagerly while the customer made the changes that we recommended and were very happy to hear that boards with the new resistor values would run the software reliably when the software programmed the drive strengths as we recommended.
We have since simulated many new designs for them before they have committed to making the boards. This helps them to avoid this difficult situation with their other projects. This has resulted in some minor changes to their boards before producing them - avoiding some crosstalk and timing issues.